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one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 617/329-4700 fax: 617/326-8703 rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a ad2s100 functional block diagram general description the ad2s100 performs the vector rotation of three-phase 120 degree or two-phase 90 degree sine and cosine signals by trans- ferring these inputs into a new reference frame which is controlled by the digital input angle f . two transforms are in cluded in the ad2s100. the first is the clarke transform which computes the sine and cosine orthogonal components of a three-phase input. these signals represent real and imaginary components which then form the input to the park transform. the park transform relates the angle of the input signals to a reference frame controlled by the digital input port. the digital input port is a 12-bit parallel binary representation. if the input signals are represented by vds and vqs, respectively, where vds and vqs are the real and imaginary components, then the transformation can be described as follows: vds' = vds cos f C vqs sin f vqs' = vds sin f + vqs cos f where vds' and vqs' are the output of the park transform and sin f , and cos f are the values internally derived by the ad2s100 from the binary digital data. the input section of the device can be configured to accept either three-phase inputs, two-phase inputs of a three-phase system, or two 90 degree input signals. the homopolar output detects the imbalance of a three-phase input only. under nor- mal conditions, this output will be zero. the digital input section will accept a resolution of up to 12 bits (ad2s100). an input data strobe signal is required to synchro- nize the position data and load this information into the device counters. a busy output is provided to identify the conversion status of the ad2s100. the busy period represents the conver- sion time of the vector rotation. two analog output formats are available. a two-phase rotated output facilitates multiple rotation blocks. three phase format signals are available for use with a pwm inverter. product highlights hardware peripheral for standard microcontrollers and dsp systems the ad2s100 removes the time consuming cartesian transfor- mations from digital processors and benchmarks a speed im- provement of 30:1 on standard 20 mhz processors. ad2s100 transformation time = 2 m s (typ). field oriented control of ac and dc brushless motors the ad2s100 accommodates all the necessary functions to provide a hardware solution for ac vector control of induction motors and dc brushless motors. three-phase imbalance detection the ad2s100 can be used to sense overcurrent situations or imbalances in a three-phase system via the homopolar output. resolver-to-digital converter interface the ad2s100 provides general purpose interface for position sensors used in the application of dc brushless and ac induction motor control. ia ib ic vds vqs sector multiplier sine and cosine multiplier input data strobe homopolar output homopolar reference +5v gnd ?v f position parallel data 12 bits cos ( q + 120 + f ) cos ( q + 240 + f ) va vb vc 30-20 sin q cos q cos q sin q cos q + f conv1 conv2 decode busy vds' vqs' sin q + f sector multiplier sine and cosine multiplier ia + ib + ic 3 2f -3f cos ( q + 120 ) cos ( q + 240 ) ac vector processor features complete vector coordinate transformation on silicon mixed signal data acquisition three-phase 120 8 and orthogonal 90 8 signal transformation three-phase balance diagnosticChomopolar output applications ac induction and dc permanent magnet motor control hvac, pump, fan control material handling robotics spindle drives gyroscopes dryers washing machines electric cars actuator three-phase power measurement digital-to-resolver & synchro conversion obsolete
ad2s100Cspecifications parameter min typ max units conditions signal inputs ph/ip1, 2, 3, 4 voltage level 2.8 6 3.3 v p-p dc to 50 khz ph/iph1, 2, 3 voltage level 4.25 v p-p dc to 50 khz input impedance ph/ip1, 2, 3 7.5 10 k w ph/iph1, 2, 3 13.5 18 k w ph/ip1, 4 1 m w mode 1 only (2 phase) sin & cos gain ph/ip1, 2, 3, 4 0.98 1 1.02 ph/iph1, 2, 3 0.56 vector performance 3 q input-output radius error (any phase) 0.35 0.7 % dc to 600 hz angular error 1, 2 (ph/ip) 9 18 arc min dc to 600 hz (ph/iph) 24 arc min dc to 600 hz monotonicity guaranteed monotonic full power bandwidth 50 khz small signal bandwidth 200 khz analog signal outputs ph/op1, 2, 3, 4 ph/ip, ph/iph inputs output voltage 3 2.8 3.3 v p-p dc to 50 khz offset voltage 2 5 mv inputs = 0 v slew rate 2 v/ m s small signal step response 1 m s1 input to settle to 1 lsb (input to output) output resistance 15 w output drive current 3.0 4.0 ma outputs to agnd resistive load 2 k w capacitive load 50 pf strobe write 100 ns positive pulse max update rate 366 khz busy pulse width 1.7 2.5 m s conversion in process v oh 4v d c i oh = 0.5 ma v ol 1v d ci ol = 0.5 ma digital inputs db1Cdb12 v ih 3.5 v dc v il 1.5 v dc input current, i in 6 10 m a input capacitance, c in 10 pf convert mode (conv1, conv2) v ih 3.5 v dc internal 50 k w pull-up resistor v il 1.5 v dc input current 100 m a input capacitance 10 pf convert logic conv1 conv2 no connect dgnd 2-phase orthogonal with 2 inputs nominal input level dgnd v dd 3-phase (0 , 120 , 240 ) with 3 inputs nominal input level v dd v dd 3-phase (0 , 120 , 240 ) with 2 inputs nominal input level rev. a C2C (v dd = +5 v 6 5%; v ss = C5 v 6 5% agnd = dgnd = o v; t a = C40 8 c to +85 c, unless otherwise noted) obsolete
parameter min typ max units conditions homopolar output hpopCoutput v oh 4 v dc i oh = 0.5 ma v ol 1 v dc i ol = 0.5 ma hprefCreference 0.5 v dc homopolar output-internal i source = 25 m a and 20 k w to agnd hpfilt-filter 100 k w internal resistor with external capacitor = 220 nf power supply v dd 4.75 5 5.25 v dc v ss C5.25 C5 C4.75 v dc i dd 4 10 ma quiescent current i ss 4 10 ma quiescent current notes 1 angular accuracy includes offset and gain errors. stationary digital input and maximum analog frequency inputs. 2 included in the angular error is an allowance for the additional error caused by the phase delay as a function of input frequency. for example, if f input = 600 hz, the contribution to the error due to phase delay is: 650 ns f input 60 360 = 8.4 arc minutes. 3 output subject to input voltage and gain. specifications in boldface are production tested. specifications subject to change without notice. ad2s100 rev. a C3C recommended operating conditions power supply voltage (+v dd , Cv ss ) . . . . . . . . . 5 v dc 5% analog input voltage (ph/ip1, 2, 3, 4) . . . . . . 2 v rms 10% analog input voltage (ph/iph1, 2, 3) . . . . . . 3 v rms 10% ambient operating temperature range industrial (ap) . . . . . . . . . . . . . . . . . . . . . . . C40 c to +85 c ordering guide model temperature range accuracy option* ad2s100ap C40 c to +85 c 18 arc min p-44a *p = plastic leaded chip carrier. absolute maximum ratings (t a = +25 c) v dd to agnd . . . . . . . . . . . . . . . . . . . . . . . C0.3 v to +7 v dc v ss to agnd . . . . . . . . . . . . . . . . . . . . . . . +0.3 v to C7 v dc agnd to dgnd . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 v dc analog input voltage to agnd . . . . . . . . . . . . . . . v ss to v dd digital input voltage to dgnd . . . . C0.3 v to v dd + 0.3 v dc digital output voltage to dgnd . . . C0.3 v to v dd + 0.3 v dc analog output voltage to agnd . . . . . . . . . . . . . . . . . . . . . . v ss C 0.3 v to v dd + 0.3 v dc analog output load condition (ph/op1, 2, 3, 4 sin q , cos q) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 k w power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 mw operating temperature industrial (ap) . . . . . . . . . . . . . . . . . . . . . . . C40 c to +85 c storage temperature . . . . . . . . . . . . . . . . . C65 c to +150 c lead temperature (soldering, 10 sec) . . . . . . . . . . . . . +300 c caution 1. absolute maximum ratings are those values beyond which damage to the device may occur. 2. correct polarity voltages must be maintained on the +v dd and Cv ss pins. warning! esd sensitive device caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the ad2s100 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. obsolete
ad2s100 rev. a C4C pin designations 1, 2, 3 pin mnemonic description 3 strobe begin conversion 4v dd positive power supply 5v ss negative power supply 6 ph/op4 sin ( q + f) 7 ph/op1 cos ( q + f) 8 ph/op3 cos ( q + 240 + f) 9 ph/op2 cos ( q + 120 + f) 10 agnd analog ground 11 ph/ip4 sin q input 12 ph/iph3 high level cos ( q + 240 ) input 13 ph/ip3 cos ( q + 240 ) input 14 ph/iph2 high level cos ( q + 120 ) input 15 ph/ip2 cos ( q + 120 ) input 16 ph/iph1 high level cos q input 17 ph/ip1 cos (q) input 19 v ss negative power supply 20 hpref homopolar reference 21 hpop homopolar output 22 hpfilt homopolar filter 23 conv1 select input format (3 phase/3 wire, sin q 24 conv2 cos q /input, 3 phase/2 wire) 25 cos cos output 26 sin sin output 27 db12 (db1 = msb, db12 = lsb 38 db1 parallel input data) 41 v dd positive power supply 42 dgnd digital ground 44 busy conversion in progress notes signal inputs ph/ip and ph/iph on pin nos 11 through 17. 1 90 orthogonal signals = sin q , cos q (resolver) = ph/ip4 and ph/ip1. 2 three phase, 120 , three-wire signals = cos q , cos ( q + 120 ), cos ( q + 240 ). = ph/ip1, ph/ip2, ph/ip3 high level = ph/iph1, ph/iph2, ph/iph3. 3 three phase, 120 , two-wire signals = cos ( q + 120 ), cos ( q + 240 ) = ph/ip2, ph/ip3. in all cases where any of the input pins 11 through 17 are not used, they must be left unconnected. pin configuration 6 5 4 3 2 1 44 43 42 41 40 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 v ss v dd strobe nc nc busy dgnd v dd nc nc v ss hpref hpop conv1 conv2 cos db12 hpfilt db11 nc = no connect top view (not to scale) ad2s100 ph/op4 nc sin 7 8 11 12 13 14 15 16 17 9 10 nc db1 db2 db3 db4 db5 db6 db7 db8 db9 db10 ph/op1 ph/op3 ph/op2 agnd ph/ip4 ph/iph3 ph/ip3 ph/iph2 ph/ip2 ph/iph1 ph/ip1 obsolete
ad2s100 rev. a C5C to relate these stator current to the reference frame the rotor currents assume the same rectangular coordinates, but are now rotated by the operator e j f , where e j f = cos f + jsin f . here the term vector rotator comes into play where the stator current vector can be represented in rotor-based coordinates or vice versa. the ad2s100 uses e j f as the core operator. here f represents the digital position angle which rotates as the rotor moves. in terms of the mathematical function, it rotates the orthogonal i ds and i qs components as follows: i ds ' + j i qs ' = ( i ds + ji qs ) e j f where i ds ', i qs ' = stator currents in the rotor reference frame. and e j f = cos f + jsin f = (i ds + ji qs )( cos f + jsin f ) the output from the ad2s100 takes the form of: i ds ' = i ds cos f C i qs sin f i qs ' = i ds sin f + i qs cos f the matrix equation is: [ i ds ' ] = [ cos f C sin f ][ i ds ] i qs ' sin f cos f i qs and it is shown in figure 2. i ds i qs i ds ' i qs ' f e j f figure 2. ad2s100 vector rotation operation digital f latch 3f + 2 f transformation sine and cosine multiplier (dac) sine and cosine multiplier (dac) cos( q + f ) cos( q +(120 + f )) cos( q +(240 + f )) park output clark cos q cos q + 120 cos q + 240 sin q 2 f ? f input clark latch latch figure 3. converter operation diagram theory of operation a fundamental requirement for high quality induction motor drives is that the magnitude and position of the rotating air-gap rotor flux be known. this is normally carried out by measuring the rotor position via a position sensor and establishing a rotor reference frame that can be related to stator current coordinates. to generate a flux component in the rotor, stator current is ap- plied. a build-up of rotor flux is concluded which must be maintained by controlling the stator current, i ds , parallel to the rotor flux. the rotor flux current component is the magnetizing current, i mr . torque is generated by applying a current component which is perpendicular to the magnetizing current. this current is nor- mally called the torque generating current, i qs . to orient and control both the torque and flux stator current vectors, a coordinate transformation is carried out to establish a new reference frame related to the rotor. this complex calcula- tion is carried out by the ad2s100 vector processor. to expand upon the vector operator a description of a single vector rotation is of assistance. if it is considered that the mod- uli of a vector is op and that through the movement of rotor position by f , we require the new position of this vector it can be deduced as follows: let original vector op = a (cos u + jsin u ) where a is a constant; so if oq = op e j f (1) and: e j f = cos f + jsin f oq = a (cos ( u + f ) + jsin ( u + f )) = a [ cos u cos f C sin u sin f + jsin u cos f + jcos u sin f ] = a [( cos u + jsin u ) ( cos f + j sin f )] (2) q f q + f q p o a d figure 1. vector rotation in polar coordinate the complex stator current vector can be represented as i s = i as + ai bs + a 2 i cs where a = e j 2 p 3 and a 2 = e j 4 p 3 . this can be re- placed by rectangular coordinates as i s = i ds + ji qs (3) in this equation i ds and i qs represent the equivalent of a two- phase stator winding which establishes the same magnitude of mmf in a three-phase system. these inputs can be seen after the three-phase to two-phase transformation in the ad2s100 block diagram. equation (3) therefore represents a three-phase to two-phase conversion. obsolete
ad2s100 rev. a C6C analog signal input and output connections input analog signals all analog signal inputs to ad2s100 are voltages. there are two different voltage levels of three-phase (0 , 120 , 240 ) signal in- puts. one is the nominal level, which is 2.8 v dc or 2 v rms and the corresponding input pins are ph/ip1 (pin 17), ph/ip2 (pin 15), ph/ip3 (pin 13) and ph/ip4 (pin 11). the high level inputs can accommodate voltages from nominal up to a maximum of v dd /v ss . the corresponding input pins are ph/iph1 (pin 16), ph/iph2 (pin 14) and ph/iph3 (pin 12). the homopolar output can only be used in the three-phase connection mode. the converter can accept both two-phase format and three- phase format input signals. for the two-phase format input, the two inputs must be orthogonal to each other. for the three- phase format input, there is the choice of using all three inputs or using two of the three inputs. in the latter case, the third in- put signal will be generated internally by using the information of other two inputs. the high level input mode, however, can only be selected with three-phase/three-input format. all these different conversion modes, including nominal/high input level and two/three-phase input format can be selected using two se- lect pins (pin 23, pin 24). the functions are summarized in table i. table i. conversion mode selection conv1 conv2 mode description (pin 23) (pin 24) mode1 2-phase orthogonal with 2 inputs nc dgnd nominal input level mode2 3-phase (0 , 120 , 240 ) with 3 inputs dgnd v dd nominal/high input level* mode3 3-phase (0 , 120 , 240 ) with 2 inputs v dd v dd nominal input level *the high level input mode can only be selected with mode2. mode1: 2-phase/2 inputs with nominal input level in this mode, ph/ip1 and ph/ip4 are the inputs and the pins 12 through 16 must be left unconnected. mode2: 3-phase/3 inputs with nominal/high input level in this mode, either nominal or high level inputs can be used. for nominal level input operation, ph/ip1, ph/ip2 and ph/ip3 are the inputs, and there should be no connections to ph/iph1, ph/iph2 and ph/iph3; similarly, for high level input opera- tion, the ph/iph1, ph/iph2 and ph/iph3 are the inputs, and there should be no connections to ph/ip1, ph/ip2 and ph/ip3. in both cases, the ph/ip4 should be left unconnected. for high level signal input operation, select mode2 only. mode3: 3-phase/2 inputs with nominal input level in this mode, ph/ip2 and ph/ip3 are the inputs and the third signal will be generated internally by using the information of other two inputs. it is recommended that ph/ip1, ph/iph1, ph/iph2, ph/ip4 and ph/iph3 should be left unconnected. converter operation the architecture of the ad2s100 is illustrated in figure 3. the ad2s100 is configured in the forward transformation which ro- tates the stator coordinates to the rotor reference frame. forward rotation in this configuration the 3 f C2 f clark is bypassed, and inputs are fed directly into the quadrature (ph/ip4) and direct (ph/ ipi) inputs to the park transform, e i f , where f is defined by the ad2s100s digital input. position data, f , is loaded into the in- put latch on the positive edge of the strobe pulse. (for detail on the timing, please refer to the timing diagram.) the negative edge of the strobe signifies that conversion has commenced. a busy pulse is subsequently produced as data is passed from the input latches to the sin and cos multipliers. during the loading of the multiplier, the busy pulse remains high to ensure simulta- neous setting of f in both the sin and cos registers. the negative edge of the busy pulse signifies that the multipliers are set up and the orthogonal analog inputs are multiplied real time. the resultant two outputs are accessed via the ph/opi (pin 7) and ph/op4 (pin 6), alternatively they can be directly applied to the output clark transform. the clark output is the vector sum of the analog input vector (cos q (ph/opl), cos ( q + 120 ) (ph/op2), cos ( q + 240 ) (ph/op3) and the digital in- put vector f . for other configurations, please refer to forward and reverse transformation. connecting the converter power supply connection the power supply voltages connected to v dd and v ss pins should be +5 v dc and C5 v dc and must not be reversed. pin 4 (v dd ) and pin 41 (v dd ) should both be connected to +5 v; similarly, pin 5 (v ss ) and pin 19 (v ss ) should both be con- nected to C5 v dc. it is recommended that decoupling capacitors, 100 nf (ceramic) and 10 m f (tantalum) or other high quality capacitors, are con- nected in parallel between the power line v dd , v ss and agnd adjacent to the converter. separate decoupling capacitors should be used for each converter. the connections are shown in fig- ure 4. ad2s100 top view 1 23 12 34 v dd v ss v ss v dd agnd 100nf 100nf 10? 10? + + +5v gnd ?v figure 4. ad2s100 power supply connection obsolete
ad2s100 rev. a C7C output analog signals there are three forms of analog output from the ad2s100. sin/cos orthogonal output signals are derived from the clark/ three-to-two-phase conversion before the park angle rotation. these signals are available on pin 25 (cos u ) and pin 26 (sin u ), and occur before park angle rotation. three-phase output signals (cos ( q + f ), cos ( f + q + 120 ), cos ( f + q + 240 )), where f represents digital input angle. these signals are available on pin 7 (ph/op1), pin 9 (ph/op2) and pin 8 (ph/op3), respectively. two-phase (sin ( q + f ), cos ( q + f )) signals these represent the output of the coordinate transformation. these signals are available on pin 6 (ph/op4, sin ( q + f )) and pin 7 (ph/op1, cos ( q + f )). homopolar output homopolar reference in a three-phase ac system, the sum of the three inputs to the converter can be used to indicate whether or not the phases are balanced. if v sum = ph/ip1 + ph/ip2 + ph/ip3 (or ph/iph1 + ph/iph2 + ph/iph3) this can be rewritten as v sum = [cos u , + cos ( u + 120 ) + cos ( u + 240 )] = 0. any imbalances in the line will cause the sum v sum 1 0. the ad2s100 homopolar output (hpop) goes high when v sum > 3 v ts . the voltage level at which the hpop indicates an imbalance is determined by the hpref threshold, v ts . this is set internally at 0.5 v dc ( 0.1 v dc). the hpop goes high when v ts < ( cos q+ cos ( q+ 120 ) + cos ( q+ 240 )) 3 v where v is the nominal input voltage. with no external components v sum must exceed 1.5 v dc in order for hpop to indicate an imbalance. the sensitivity of the threshold can be reduced by connecting an external resistor be- tween hpop and ground in figure 5 where, v ts = 0. 5 r ext r ext + 20000 r ext = w v ts = v dc. 20kw 25? homopolar reference external resistor to trigger figure 5. the equivalent homopolar reference input circuitry example: from the equivalent circuit, it can be seen that the in- clusion of a 20 k w resistor will reduce v ts to 0.25 v dc. this corresponds to an imbalance of 0.75 v dc in the inputs. homopolar filtering the equation v sum = cos u + cos ( u + 120 ) + cos (u + 240 ) = 0 denotes an imbalance when v sum 1 0. there are conditions, however, when an actual imbalance will occur and the condi- tions as defined by v sum will be valid. for example, if the first phase was open circuit when u = 90 or 270 , the first phase is valid at 0 v dc. v sum is valid, therefore, when cos u is close to 0. in order to detect an imbalance u has to move away from 90 or 270 , i.e., when on a balanced line cos u 1 0. line imbalance is detected as a function of hpref, either set by the user or internally set at 0.5 v dc. this corresponds to a dead zone when f = 90 or 270 30 , i.e., v sum = 0, and, therefore, no indicated imbalance. if an external 20 k w resistor is added, this halves v ts and reduces the zone to 15 . note this example only applies if the first phase is detached. in order to prevent this false triggering an external capacitor needs to be placed from hpfilt to ground, as shown in figure 5. this averages out the perceived imbalance over a complete cycle and will prevent the hpop from alternatively indicating balance and imbalance over u = 0 to 360 . for d q dt = 1000 rpm c ext = 200 nf d q dt = 100 rpm c ext = 2. 2 m f note: the slower the input rotational speed, the larger the time constant required over which to average the hpop output. use of the homopolar output at slow rotational speeds becomes impractical with respect to the increased value for c ext . ad2s100 top view 123 12 34 agnd hpref hpop hpfilt 220nf dgnd c ext r ext hpop gnd hpref figure 6. ad2s100 homopolar output connections obsolete
ad2s100 rev. a C8C timing diagrams busy output the state of converter is indicated by the state of the busy out- put (pin 44). the busy output will go hi at the negative edge of the strobe input. this is used to synchronize digital input data and load the digital angular rotation information into the device counter. the busy output will remain hi for 2 m s, and go lo until the next strobe negative edge occurs. strobe input the width of the positive strobe pulse should be at least 100 ns, in order to successfully start the conversion. the maxi- mum frequency of strobe input is 366 khz, i.e., there should be at least 2.73 m s from the negative edge of one strobe pulse to the next rising edge. this is illustrated by the following tim- ing diagram and table. t 1 t 2 t 3 t 4 strobe busy t f t r figure 7. ad2s100 timing diagram note: digital data should be stable 25 ns before and after posi- tive strobe edge. table ii. ad2s100 timing table parameter min typ max condition t 1 100 ns strobe pulse width t 2 30 ns strobe to busy - t 3 1.7 m s 2.5 m s busy pulse width t 4 100 ns busy to strobe - t r 20 ns busy pulse rise time with no load 150 ns busy pulse rise time with 68 pf load t f 10 ns busy pulse fall time with no load 120 ns busy pulse fall time with 68 pf load typical circuit configuration figure 8 shows a typical circuit configuration for the ad2s100 in a three phase, nominal level input mode (mode2). three phase input ad2s100 top view 141 38 30 27 23 12 16 digital angle input lsb sin cos 10? 100nf 10? 100nf ?v +5v gnd two/three phase output strobe busy hpop hpfilt hpref msb ph/op1 ph/op3 ph/op2 agnd ph/ip4 ph/ip3 ph/ip2 ph/ip1 34 figure 8. typical circuit configuration applications forward and reversetransformation the ad2s100 can perform both forward and reverse transfor- mations. the section theory of operation explains how the chip operates with the core operator e +j f , which performs a for- ward transformation. the reverse transformation, e Cj f , is not mentioned in the above sections of the data sheet simply to avoid the confusion in the functionality and pinout. however, the reverse transformation is very useful in many different appli- cations, and the ad2s100 can be easily configured in a reverse transformation configuration. figure 9 shows four different phase input/output connections for ad2s100 reverse transfor- mation operation. ? 3 phase ?3 phase e ? f ? e +j f e +j f e +j f e +j f 2 phase ?2 phase 2 phase ?3 phase 3 phase ?2 phase forward transformation ad2s100 reverse transformation ad2s100 cosq sinq cos( q +f) cos( q + f + 120) cos( q + f + 240) cos( q + 120) cos( q + 240) cosq sinq cosq cosq cos( q + 120) cos( q + 240) cos( q + f) sin( q + f) cos( q + f) cos( q + f + 120) cos( q + f + 240) cos( q + f) sin( q + f) cosq cos( q + 120) cos( q + 240) cos( q ?f) cos( q ?f + 120) cos( q ?f + 240) cos( q ?f) cos( q ?f + 120) cos( q ?f + 240) cosq sinq cos( q ?f) sin( q ?f) cosq sinq cosq cos( q + 120) cos( q + 240) cos( q ?f) sin( q ?f) e ? f e ? f e ? f figure 9. reverse transformation connections obsolete
ad2s100 rev. a C9C ? in figure 9, C1 operator performs a 180 phase shift opera- tion. it can be illustrated by a 2-phase-to-3-phase reverse trans- formation. an example is shown in figure 10. ad2s100 f ph/ip1 (cos q) ph/op1 cos( q + f) ph/op3 cos( q + 240 + f) ph/ip4 (sin q) ph/op2 cos( q + 120 + f) cosq sinq cos( q ?f) cos( q + 240 ? f) cos( q + 120 ? f) r r r 2 figure 10. two-phase to three-phase reverse transformation field oriented control of ac induction machine in a rotor flux frame the architecture shown in figure 11 identifies a simplified scheme where the ad2s100 permits the dsp computing core to execute the motor control in what is normally termed the rotor reference frame. this reference frame actually operates in synchronism with the rotor of a motor. this has significant benefits regarding motor control efficiency and economics. the calculating power required in the rotor reference frame is signifi- cantly reduced because the currents and flux are rotating at the slip frequency. this permits calculations to be carried out in time frames of, 100 m s, or under by a fixed-point dsp. bench- mark timing in this type of architecture can attain floating-point speed processing with a fixed-point processor. perhaps the larg- est advantage is in the ease with which the rotor flux position can be obtained. a large amount of computation time is, there- fore, removed by the ad2s100 vector processors due to the split architecture shown in figure 11. motor control systems employing one dsp to carry out the cartesian to polar transfor- mations required for vector control are, therefore, tasked with additional duties due to the fact that they normally operate in the flux reference frame. the robustness of the control system can also be increased by carrying out the control in the rotor reference frame. this is achieved through the ability to increase and improve both the algorithm quality in nonlinear calculations attributed to magne- tizing inductance and rotor time constant for example. an increase in sampling time can also be concluded with this archi- tecture by avoiding the additional computing associated with number truncation and rounding errors which reduce the signal- to-noise rejection ratio. is1 is2 is3 vector co-processor reverse rotation ad2s100 speed control limit torque control limit field weakening forward rotation ad2s100 vector co-processor v qs' v ds' r' vs1 vs2 vs3 v v v control software adsp2101 position feedback velocity feedback position set point + e' e iqs ids w' w + + + + w imr' iqs w 1 w 2 imr md' iqs' ids' iqs ids cm i mr max v + + e q 2 + + (a + jb)e' ?r' (a + jb)e ?r r tr figure 11. rotor reference frame architecture obsolete
ad2s100 rev. a C10C simple slip control in an adjustable-frequency drive, the control strategy must en- sure that motor operation is restricted to low slip frequencies, resulting in stable operation with a high power factor and a high torque per stator ampere. figure 12 shows the block diagram of simple slip control using the ad2s100. here, the slip frequency command w 2 and the current amplitude command are sent to the microprocessor to generate two orthogonal signals, |i| sin q and |i| cos q here ( q = w 2 .) with the actual shaft position angle, f , (resolver-to-digital converter) and the orthogonal signals from ac induction mtr pwm + inverter ad2s100 ?roc ad2s80a rdc (i) set slip freq i sin q i cos q ia ib ic resolver f w 2 = dq dt figure 12. slip control of ac induction motor with ad2s100 the m p, the ad2s100 generates the inverter frequency and am- plitude command into a three-phase format. the three-phase sine wave reference currents are reproduced in the stator phases. for general applications, both the steady-state and dynamic per- formance of this simple control scheme is satisfactory. for de- tailed information about this application, please refer to the bibliography at the end of the data sheet. advanced pmsm servo control electronically commutated permanent magnet synchronous motors (pmsm) are used in high performance drives for machine tools and robotics. when a field orientated control scheme is deployed, the resulting brushless drive has all the properties required for servo applications in machine tool fed drives, industrial robots, and spindle drives. these properties include large torque/inertia ratio, a high peak torque capability for fast acceleration and deceleration with high torsional stiff- ness at standstill. figure 13 shows the ad2s100 configured for both forward and reverse transformations. this architecture concludes both flux and torque current components independently. the additional control of vd (flux component) allows for the implementation of field weakening schemes and maintenance of power factor. 2/3 3/2 pmsm inv + pwm ad2s100 ad2s100 ad2s82 ++ + pi w w ref id iq idref iqref va vc vb vq vd pi pi e +j f e ? f f figure 13. pmsm servo control using ad2s100 for more detailed information, please refer to the application note vector control using a single vector rotation semicon- ductor for induction and permanent magnet motors. motion control dsp coprocessor ac induction motors are superior to dc motors with respect to size/power ratio, weight, rotor inertia, maximum rotating veloc- ity, efficiency and cost for motor ratings greater than 5 hp. however, because of nonlinear and the highly interactive multi- variable control structure, ac induction motors have been con- sidered difficult to control in applications demanding variable speed and torque. field orientated control theory and practice, under development since 1975, has offered the same level of control enjoyed by tra- ditional dc machines. practical implementation of these algo- rithms involves the use of dsp and microprocessor based architectures. the ad2s100 removes the needs for software implementation of the rotor-to-stator and stator-to-rotor trans- formations in the dsp or m p. the reduction in throughput times from typically 100 m s ( m p) and 40 m s (dsp) to 2 m s in- creases system bandwidths while also allowing additional fea- tures to be added to the cpu. the combination of the fixed point adsp-2101 and the ad2s100, the advanced motion control engine shown in figure 14, enables bandwidths previ- ously attainable only through the use of floating point devices. for more detailed information on the ad2s100 vector control application and on this advanced motion control engine, please refer to application notes vector control using a single vector rotation semiconductor for induction and permanent magnet motors. measurement of harmonics three-phase ac power systems are widely used in power genera- tion, transmission and electric drive. the quality of the electric- ity supply is affected by harmonics injected into the power main. in inverter fed ac machines, fluxes and currents of various fre- quencies are produced. predominantly in ac machines the 5th and 7th harmonics are the most damaging; their reaction with the fundamental flux component produces 6th harmonic torque pulsations. the subsequent pulsating torque output may result in uneven motion of the motor, especially at low speeds. the ad2s100 can be used to monitor and detect the presence and magnitude of a particular harmonic on a three-phase line. figure 15 shows the implementation of such a scheme using the ad2s100. note, the actual line voltages will have to be scaled before applying to the three-phase input of the ad2s100. selecting a harmonic is achieved by synchronizing the rotational frequency of the park digital input, f , with the frequency of the fundamental flux component and the integer harmonic selected. the update rate, r, of the counters is determined by: r = 4096 n w 2 p here, r = input clock pulse rate (pulses/second); n = the order of harmonics to be measured; w = fundamental angular frequency of the ac signal. obsolete
ad2s100 rev. a C11C vector coprocessor ad2s100 adc host computer adsp-2101/ adsp-2105 dac ad2s80a r/d converter ad7874 dac-8412 vector coprocessor ad2s100 ia, ib, ic q induction motor inv + pwm figure 14. advanced motion control engine the magnitude of the n-th harmonic as well as the fundamental component in the power line is represented by the output of the low-pass filter, a k . in concert with magnitude of the harmonic the ad2s100 homopolar output will indicate whether the three phases are balanced or not. for more details about this application, refer to the related application note listed in the bibliography. low pass filter e ? f park transformation 12-bit up/down counter ad2s100 a k homopolar output pulse inputs direction va vb vc two-to-three clark transformation vd vq vd 1 vq 1 figure 15. harmonics measurement using ad2s100 multiple pole motors for multi-pole motor applications where a single speed resolver is used, the ad2s100 input has to be configured to match the electrical cycle of the resolver with the phasing of the motor windings. the input to the ad2s100 is the output of a resolver- to-digital converter, e.g., ad2s80a series. the parallel output of the converter needs to be multiplied by 2 nC1 , where n = the number of pole parts of the motor. in practice this is implemented by shifting the parallel output of the converter left relative to the number of pole pairs. figure 16 shows the generic configuration of the ad2s80a with the ad2s100 for a motor with n pole pairs. the msb of the ad2s100 is connected to msb-(n-1) bit of the ad2s80a digi- tal output, msb-1 bit to msb-(n-2) bit, . . ., lsb bit to lsb bit of ad2s80a, etc. msb msb-1 . . . msb ?(n?) . . . lsb + (n?) msb msb-1 msb-2 . . . . . . . lsb . . . . ad2s80a ad2s100 12,14 or 16-bit resolution mode n = poles figure 16. a general consideration in connecting r/d converter and ad2s100 for multiple pole motors figure 17 shows the ad2s80a configured for use with a four pole motor, where n = 2. using the formula described the msb is shifted left once ad2s80a ad2s100 bit1 bit2 . . . . . . bit13 bit14 msb msb-1 . . . . . . . lsb (msb) (lsb) 14-bit resolution mode . . . . . . figure 17. connecting of r/d converter ad2s80a and ad2s100 for four-pole motor application obsolete
ad2s100 rev. a C12C digital-to-resolver and synchro conversion the ad2s100 can be configured for use as a 12-bit digital-to- resolver (drc) or synchro converter (dsc). drcs and dscs are used to simulate the outputs of a resolver or a synchro. the simulated outputs are represented by the transforms outlined below. resolver outputs asin w t.cos f asin w t.sin f synchro outputs asin w t.sin f asin w t. sin ( f + 120 ) asin w t. sin ( f + 240 ) where: asin w t = fixed ac reference f = digital input angle, i.e., shaft position the waveforms are shown in figures 18 and 19. 360 90 r2 to r4 (ref) 0 s3 to s1 (sin) s2 to s4 (cos) 270 180 q figure 18. electrical representation and typical resolver signals 360 90 0 s1 to s2 270 180 q s2 to s3 s3 to s1 r1 to r2 figure 19. electrical representation and typical synchro signals configuring the ad2s100 for drc and dsc operation is done by the following. drcmust select mode 1 inputs ph/ip4 pin 11 agnd ph/ip1 pin 1 reference asin w t outputs ph/op1 pin 7 asin w t cos f ph/op4 pin 6 asin wt sin f dscmust select mode 1 inputs ph/ip4 pin 11 reference asin w t ph/ip1 pin 17 agnd outputs ph/op1 pin 7 Casin w t sin f ph/op2 pin 9 Casin wt sin ( f + 120 ) ph/op3 pin 8 Casin wt sin ( f + 240 ) notes 1. valid information is only available after the strobe pulse and busy go low. for more information on drcs see the ad2s65/ad2s66 data sheet. 2. to correct for inverse phasing of the dsc outputs the reference should be inverted, or the msb can be inverted. application notes list 1. vector control using a single vector rotation semiconduc- tor for induction and permanent magnet motors, by f. p. flett, analog devices. 2. gamana C dsp vector coprocessor for brushless motor control, by analog devices and infosys manufacturing system. 3. silicon control algorithms for brushless permanent magnet synchronous machines, by f. p. flett. 4. single chip vector rotation blocks and induction motor field oriented control, by a. p. m. van den bossche and p. j. m. coussens. 5. three phase measurements with vector rotation blocks in mains and motion control, p. j. m. coussens, et al. 6. digital to synchro and resolver conversion with the ac vector processor ad2s100, by dennis fu. 7. experiment with the ad2s100 evaluation board, by dennis fu. c1938C18C7/94 printed in u.s.a . outline dimensions dimensions shown in inches and (mm). 44-lead plastic leaded chip carrier (p-44a) 0.032 (0.81) 0.026 (0.66) 0.021 (0.53) 0.013 (0.33) 0.056 (1.42) 0.042 (1.07) 0.025 (0.63) 0.015 (0.38) 0.180 (4.57) 0.165 (4.19) 0.63 (16.00) 0.59 (14.99) 0.110 (2.79) 0.085 (2.16) 0.040 (1.01) 0.025 (0.64) 0.050 (1.27) bsc 0.656 (16.66) 0.650 (16.51) sq 0.695 (17.65) 0.685 (17.40) sq 0.048 (1.21) 0.042 (1.07) 0.048 (1.21) 0.042 (1.07) 40 6 top view 39 29 18 17 pin 1 identifier 7 28 0.020 (0.50) r obsolete

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